Alois Knoll, Markus Freericks:
Aldisp - An Applicative Real-Time Language for DSP
Programming,
CIT/IEEE International Conference on Signal Processing, Beijing, 1990
(Presented by Alois. Short paper on the thesis language. For all
these IEEE conferences, no good postscript versions exist -- we actually
had to send in a paper copy on special layout pages, at 120% magnification.
Horrible work, much manual cut-and-paste. Added to this was the task of
cutting down the paper to 4 pages (6 would have been adequate), resulting
in a badly lay-outed text that couldn't really explain anything.)
Rupert C. Nieberle and Markus Freericks:
Extending an Interactive Music Environment,
Computer Music Journal Vol. 15 No. 2 (Summer 1991)
(Describes my "Ylem" Realtime-Scheme-in-Realtime-Forth language
extension, which I wrote as a MS thesis (Vordiplom). Of course, I optimized too
much, with the result that the final implementation ran quite fast, but the
language kernel was nearly 100% 68k assembly language. A year later, the
underlying Forth system (Formula, by Ron Kuivila and Dave Anderson), was
rewritten and vastly improved (before, it was cooperatative multitasking,
now it is preemptive), but this broke most anything of Ylem: before, task
switches were explictit and I could mostly ignore them in the GC and the
interpreter state; now, explicit locks were needed. Since I wasn't working
actively with Ylem anymore, it became a typical "orphan language".)
Alois Knoll, Markus Freericks:
An applicative real-time language for DSP-programming supporting
asynchronous data-flow concepts,
in: Microprocessing and Microprogramming, Vol.32, No. 1-5 (August
1991 - Proceedings Euromicro '91), pp. 541-548
(Elaborates on the asynchronous concepts of ALDiSP.)
Alois Knoll, Achim Schweikard, Markus Freericks:
Eine datenflußorientierte, funktionale Programmiersprache für
die Echtzeitdatenverarbeitung,
in: Prozeßrechensystem '91, Proceedings, Berlin, Februar 1991,
Springer Informatik-Fachberichte 269
(Mostly the same as the last entry, but re-written in German.)
Markus Freericks:
The nML Machine Description Formalism,
Forschungsberichte des Fachbereichs Informatik Nr.91-15, TU Berlin, 1991,
41pp.
(The brain-child I am proudest of, since it is used by the largest
number of people and doesn't succumb to featuritis in the way ALDiSP
does. Still, there are a lot of typos and small omissions in this version
of the nML report. Also, the yacc grammar was a mess. The report underwent
constant revision and some minor version numbers, aquired appendices and
lost them again.)
Lawrence S. Dooley, Alois C. Knoll, M.A. Wahab, Andreas Fauth, Markus Freericks:
A Novel Approach to the design of DSP Systems Using Minimum
Complexity Finite State Machines,
1992 IEEE International Symposium on Circuits and Systems (ISCAS'92)
(Presented by Alois, I think. Explores a nifty idea originally of
Alois and Lawrence, namely to specify a DSP system by an automaton. Things
like unwanted resonances and overflow/underflow bugs might then be detected
by inspection of the automaton, and removed from it by re-mapping the
concerned translations. The result can then be used to generate VLSI. Andi
and I implemented some of this thing to test out the ideas. Of course, it
was slow for anything beyond 3-bit arithmetic. Also of course, we didn't
mention that quite so explicitly in the paper ;-)
Markus Freericks:
The nML Machine Description Formalism (updated Version 1.2),
in: ESPRIT-II Project 2260 SPRITE Progress Report (Incl. Addendum 2 to
T.A. 3) for Period June 1992-November 1992, Report No. PR-4.2, 1. Dec.
1992, Author: SPRITE Consortium, Editor: Patrick Pype (Project Manager)
(Has most of the errors and omissions of the first report
removed. At this point, nML is quite stable and we start to think of
extensions. Also, it is now an official specification language in the
CBC trajectory. (ANSI-nML can't be far away! ;-))
Markus Freericks, Alois Knoll:
Writing and Compiling DSP Algorithms in an Asynchronous Applicative
Language,
International Conference on Signal Processing '93 (ICSP'93), Beijing
(Presented by Andi, who was in Peking anyhow to present a CBC
paper. Mostly a re-hash of the "examples" section in the 92-26 TR. Yet
another IEEE-style horror-layout paper, with additional problems due to
chinese printers.)
Andreas Fauth, Markus Freericks, Alois Knoll:
Generation of Hardware Machine Models from Instruction Set
Descriptions,
in: VLSI Signal Processing, VI, Eggermont et.al. (eds), IEEE Signal
Processing Society, 1993
(This is a paper both Andi and I are quite proud of. We had both
been thinking about nML internal representations for a long time (a year?
more?). Finally, we sat in the TU for a long weekend and discussed the
Right (TM) Way to represent nML descriptions using an Grand Unified
Model. As a result, we now have a concept of generating hardware directly
from nML, which also proves to be the foundation of the timing and
pipelining models (Andi's thesis will be on this). BTW: this workshop,
while being an IEEE conference, allowed a decent publication format - no
page restrictions, and we could send in postscript.
Frank Löhr, Andreas Fauth, Markus Freericks:
SIGH/SIM - An Environment for Retargetable Instruction Set
Simulation,
Forschungsberichte des Fachbereichs Informatik Nr.93-43, TU Berlin, 1993,
33pp.
(Describes Frank's Studienarbeit on an nML simulator, implementing
many of the ideas of the VLSI'93 paper.)
Markus Freericks, Andreas Fauth, Alois Knoll:
Implementation of complex DSP systems using High-Level Design
Tools,
in: Signal Processing VI: Theories and Applications,
M. Holt, C. Cowan, P. Grant, W. Sandham (Eds.),
pp. 1329-1332,
(Proceedings of EUSIPCO-94, 7th Europ. Signal Processing Conference,
Edinburgh, Scotland, UK, 13-16 Sept. 1994)
(Describes the CBC system in its final form.)
Andreas Fauth, Johan Van Praet, Markus Freericks:
Describing Instruction Set Processors Using nML (Extended
Version),
to be published in: Proceedings of the EDC'95
(Europ. Design Conf.)
(Will be presented by Johan, probably. Describes the current status
of the nML, as it is used by IMEC and by us. Also says quite a few words on
pipeline modelling, and control flow.)