Second, there is the Computer Architecture Home Page.
Third, there is a paper by Robert F. Sproull, Ivan E. Sutherland, and
Charles E. Molnar: "Counterflow Pipeline Processor Architecture"; Sun Microsystems Labs
TR-94-25. Ever since reading Sutherland's Turing award speech, i am
interested in asynchronous architecture. It just looks to be The Right
Thing, especially when high clock rates, the problems of clock skew, and
high reliability is considered. Apparantly, most VLSI designers abhor the
idea of leaving the synchronous paradigm, because of a dearth of design
tools for asynchronous circuits. And there is the fact that at some point,
a connection to the synchronous world has to be made -- and at this point,
minimum/maximum timings are needed. Still, it is a good sign that a man
like Sutherland works with Sun.
Later: A recent thread in comp.arch on
"Future computer architectures" brought the point home again. At advanced
speeds (sa, beyound 100MHz), it becomes more and more of a problem to
distribute one clock signal over a whole board.
A propos asynchronicity. Just found this in the news:
There is an asynchronous bibliography maintained at Eindhoven University.
You can access it directly (ftp://ftp.win.tue.nl/pub/tex/async.bib.Z),
or through the Async-Bib-Browser by Manchester University, which can be
found under the Asynchronous Logic Home Page: http://www.cs.man.ac.uk/amulet/async/
(12.06.95) The Motorola PowerPC WWW site has just been updated.
(22.05.95) There's a sort of brief CPU history list at the CPU Info Center.